Figure 12 from Air spacer for 10nm FinFET CMOS and beyond

Figure 8 from Air spacer for 10nm FinFET CMOS and beyond

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Impact of MOL/BEOL Air-Spacer on Parasitic Capacitance and Circuit

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Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era - ScienceDirect

PDF] Benchmarking Silicon FinFET With the Carbon Nanotube and 2D-FETs for Advanced Node CMOS Logic Application

Directed self-assembly for ever-smaller printed circuits

Figure 12 from Air spacer for 10nm FinFET CMOS and beyond

Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era - ScienceDirect

November, 2016